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中国安防论坛»论坛 › 安防技术 › 视频监控 › JSC 济州半导体Nand MCP搭配高通联芯方案
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[讨论] JSC 济州半导体Nand MCP搭配高通联芯方案

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dct-monica

安防工作者

Rank: 3Rank: 3

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385
发表于 2018-7-27 15:57:04 | 显示全部楼层 |阅读模式
JSC 济州半导体是全球最大的移动应用解决方案提供商之一的SRAM
! [4 G8 m* K' Z: C& o' X2 D由于济州半导体出道到SRAM（静态随机存取存储器）和4MSRAM的2001市场，济州半导体持续实施全系列低功耗SRAM产品通过1M、2M、4M至8M SRAM。9 Q4 N/ J# N: D4 O
济州半导体的SRAM是建立在强大的6晶体管存储单元的技术，可以在非常低的功耗的快速存取时间。济州半导体存储器产品已被公认为最强大的低功耗存储解决方案，可以稳定地运行任何严谨的环境下可以通过移动手机。济州半导体是由世界领先的手机制造商公认的一个最可靠的SRAM制造商。除了手机应用，济州半导体SRAM SRAM提供产品应用在全世界。* O6 z; z- g( h* {

# ]" c: w% |- o4 T: g* G+ Remcp:
  T) I/ ?9 v# V& A. P6 `3 D- O4GB + 4Gb 162B (11.5mm x 13mm) JSMPFC1BA1HYHABD-H4187 n3 f: c3 [* F+ C/ e
8GB + 4Gb 162B (11.5mm x 13mm) JSMPGC1BA1HYHABD-H418
1 C/ O& W. G8 Rnand mcp:
( }" s/ a3 K. g! }+ R0 B- }" U- r1 TJSFCBB3Y7ABBD-425,JSFCBB3YHABBD-42,JSFCBB3YH3BBD-425
, N& }3 R5 F% o( u. m8 z. w/ v-4Gb x16 SLC 2Gb x32 LPDDR2 4-bit 400MHz 162B JSFCBD3YAABBD-425
; P2 f3 p+ F' r4 Y0 |& q-4Gb x8 SLC 2Gb x32 LPDDR2 4-bit 533MHz 162B JSFCBB3Y7ABBD-425A ' G. u1 p" F/ u% }6 P" a
-4Gb x8 SLC 2Gb x32 LPDDR2 4-bit 533MHz JSFCBB3Y7ABBG-425A
. Z& f4 _% l0 p: V; p, \-4Gb x16 SLC 2Gb x32 LPDDR2 4-bit 533MHz 162B JSFCBD3Y7ABBD-425A
# t* [1 T- }& N-2Gb x8 SLC 2Gb x32 LPDDR2 4-bit 400MHz JSFBBB3YHABBG-425
7 c/ W0 b8 m6 Y+ e9 s-2Gb x16 SLC 2Gb x32 LPDDR2 4-bit 400MHz 162B JSFBBD3YHABBD-425 # Q5 }- c9 n; G! W3 V
-2Gb x16 SLC 2Gb x32 LPDDR2 4-bit 400MHz162B  JSFBBD3YHABBG-425 : ^6 i. W: j1 L* z9 r" z6 W4 |* @# \
-2Gb x16 SLC 2Gb x32 LPDDR2 4-bit 533MHz 162B JSFBBD3YHABBD-425A ! F1 t6 n3 u7 \8 }* G- v
-2Gb x16 SLC 2Gb x32 LPDDR2 4-bit 533MHz 162B JSFBBD3YHABBG-425A 3 k5 ?) z  {  Z5 r
-2Gb x8 SLC 1Gb x16 LPDDR2 4-bit 400MHz 121B JSFBAA3YHABBE-425
' u6 F- v$ }; _6 J/ p-2Gb x8 SLC 1Gb x32 LPDDR2 4-bit 400MHz 162B JSFBAB3YHABBD-425
- n7 z; O1 k- A! i% ^/ J-2Gb x8 SLC 1Gb x32 LPDDR2 4-bit 400MHz 162B JSFBAB3YHABBG-425 8 Z. V3 v) `5 s9 [5 W
-2Gb x16 SLC 1Gb x16 LPDDR2 4-bit 400MHz 121B JSFBAC3YHABBE-425
$ t4 `* d: q2 i7 r6 H4 [# M2 f-2Gb x16 SLC 1Gb x32 LPDDR2 4-bit 400MHz 162B JSFBAD3YHABBD-425 ! C) I  d* A9 ]" f
-2Gb x16 SLC 1Gb x32 LPDDR2 4-bit 400MHz 162B JSFBAD3YHABBG-4255 K' H1 T# e8 i
-1Gb x8 SLC 1Gb x16 LPDDR2 4-bit 121B JSFAAA3Y7ABBE-425 0 r0 o7 l6 c: }2 J! z$ l( f: ~
-1Gb x8 SLC 1Gb x32 LPDDR2 4-bit 162B JSFAAB3Y7ABBD-425$ ]- Q( ~) ?8 i5 d. G. V. j
-4Gb x8 SLC 2Gb x32 LPDDR1 4-bit 130B JSFCBB2N7ABBA-450
+ K& w  o. L0 c+ e-4Gb x8 SLC 2Gb x32 LPDDR1 4-bit 137B JSFCBB2N7ABBC-450 ( B7 h, M" |4 H+ }) E) R; g( s
-4Gb x16 SLC 2Gb x32 LPDDR1 4-bit 130B JSFCBD2N7ABBA-450 * R0 K( w5 p& h* o
-4Gb x16 SLC 2Gb x32 LPDDR1 4-bit 137B JSFCBD2N7ABBC-450 4 d& x- c/ i5 M5 c4 A
-2Gb x8 SLC 1Gb x32 LPDDR1 1-bit 130B JSFBAB2N73ABA-450
+ \& W, I6 N+ x9 l. g) G-1Gb x16 SLC 1Gb x16 LPDDR2 4-bit JSFAAC3Y7ABBE-425
* z+ [+ B0 e1 A-1Gb x16 SLC 1Gb x16 LPDDR2 4-bit JSFAAC3YHABBE-425 5 p. Q, z% }. Z
-2Gb x8 SLC 1Gb x32 LPDDR1 1-bit 137B JSFBAB2N72ABC-450
- b! |7 I- c3 t7 R-2Gb x16 SLC 1Gb x16 LPDDR1 1-bit 130B JSFBAC2N73ABA-450
6 p; g- a# B% L* h/ ~! Z8 N0 ]-2Gb x16 SLC 1Gb x16 LPDDR1 1-bit 130B JSFBAC2N72ABA-450 2 s  ~1 }, M! c& [4 b
-2Gb x16 SLC 1Gb x16 LPDDR1 1-bit 107B JSFBAC2N73ABB-450
3 O% s- e/ B! [* V# c: H8 f2 D-2Gb x16 SLC 1Gb x16 LPDDR1 1-bit 107B JSFBAC2N72ABB-450 & N, n7 F# [0 j! v' }
-1Gb x8 SLC 512Mb x16 LPDDR1 1-bit 107B JSFA9A2N73ABB-450
6 \; [% E/ C3 r4 B& [-1Gb x8 SLC 512Mb x16 LPDDR1 4-bit 130B (8mm x9mm) JSFA9A2N73BBA-450 + e! ?( }! T" _$ q2 p. `
-1Gb x8 SLC 512Mb x16 LPDDR1 4-bit 130B (8mm x9mm) JSFA9A2N72BBA-450- f( s& z" f, K/ r8 U: V  \
-1Gb x8 SLC 512Mb x32 LPDDR1 1-bit 137B (10.5mmx 13mm) JSFA9B2N72ABC-4504 H- ~: m; d9 B7 i2 v! w1 m. |
-1Gb x16 SLC 512Mb x16 LPDDR1 1-bit 107B (10.5mmx 13mm) JSFA9C2N72ABB-450
( r/ f5 A7 q& `. g* D! w5 K-1Gb x16 SLC 512Mb x16 LPDDR1 1-bit 107B (10.5mmx 13mm) JSFA9C2N73ABB-450 - L" Z, j) s# [! ^2 X& f# W7 Z0 J
-1Gb x16 SLC 512Mb x16 LPDDR1 1-bit 130B (8mm x9mm) JSFA9C2N72ABA-450 3 X! B3 @2 ?# B: |6 [# @
-1Gb x16 SLC 512Mb x16 LPDDR1 1-bit 130B (8mm x9mm) JSFA9C2N73ABA-450 9 U+ ]( B4 T+ b/ n/ y
-1Gb x16 SLC 512Mb x16 LPDDR1 4-bit 107B (10.5mmx 13mm) JSFA9C2N72BBB-450
. G) y/ z9 Y7 ^2 ]7 Q- ]-1Gb x16 SLC 512Mb x16 LPDDR1 4-bit 130B (8mm x9mm) JSFA9C2N72BBA-450
! X8 H6 @4 |( v6 m-1Gb x16 SLC 512Mb x16 LPDDR1 4-bit 130B (8mm x9mm) JSFA9C2N73BBA-450 - w- P4 ]! e. a; ^5 S- D
-1Gb x16 SLC 512Mb x32 LPDDR1 1-bit 130B (8mm x9mm) JSFA9D2N73ABA-450
% p! U! O! c% W4 W5 n-1Gb x16 SLC 512Mb x32 LPDDR1 1-bit 130B (8mm x9mm) JSFA9D2N72ABA-450
3 c- ?+ ~, Q/ w-1Gb x8 SLC 512Mb x16 SDR 1-bit 107B (10.5mm x13mm) JSFA9A1N72ABB-460
3 m0 h3 [3 v5 c3 ]3 J-1Gb x8 SLC 512Mb x32 SDR 1-bit 137B (10.5mm x13mm) JSFA9B1N72ABC-460 ) Z% D5 s) r, R9 `. c( Q
-1Gb x8 SLC 256Mb x16 LPDDR1 1-bit 107B (10.5mmx 13mm) JSFA8A2N73ABB-450
- c4 w' X5 E! @-1Gb x8 SLC 256Mb x16 LPDDR1 4-bit 130B (8mm x9mm) JSFA8A2N73BBA-450# [2 f' s7 L1 [; s3 |3 R
-1Gb x16 SLC 256Mb x16 LPDDR1 1-bit 130B (8mm x9mm) JSFA8C2N73ABA-450 - ~7 `* Q" `9 I
-1Gb x16 SLC 256Mb x16 LPDDR1 4-bit 130B (8mm x9mm) JSFA8C2N73BBA-454 b( ^: V( R+ }% J. I& V5 c, y2 D; ?
-1Gb x8 SLC 256Mb x32 SDR 1-bit 137B (10.5mm x13mm) JSFA8B1N72ABC-460: X9 q! X0 F' {+ R
-4Gb x8 SLC 2Gb x32 LPDDR1 4-bit 137B (10.5mm x13mm) JSFCBB2NHABBC-450
3 t7 `# z: s; J  M, a/ \-4Gb x16 SLC 2Gb x32 LPDDR1 4-bit 137B (10.5mm x13mm) JSFCBD2NHABBC-450
2 B4 Y8 ^7 G7 k! W! n-2Gb x8 SLC 1Gb x16 LPDDR1 1-bit 130B (8mm x9mm) JSFBAA2NH3ABA-450
" l# J& A) {! e9 W6 R) B-2Gb x8 SLC 1Gb x32 LPDDR1 1-bit 130B (8mm x9mm) JSFBAB2NH3ABA-450 0 Y! l: U% [. `, K% `8 {" y1 O& E$ |
-2Gb x8 SLC 1Gb x32 LPDDR1 4-bit 130B (8mm x9mm) JSFBAB2NH3BBA-450 & p6 Q" b1 ?  B- p# Z- K  s# T
-2Gb x8 SLC 1Gb x32 LPDDR1 4-bit(64B) 130B (8mmx 9mm) JSFBAB2NH3CBA-450 4 |0 p! m. k2 o% Y9 g+ w
-2Gb x8 SLC 1Gb x32 LPDDR1 4-bit 137B (10.5mm x13mm) JSFBAB2NH3BBC-450 % Q$ V- e/ t' n
-2Gb x16 SLC 1Gb x16 LPDDR1 4-bit 130B (8mm x9mm) JSFBAC2NH3BBA-450 2 O* S' K7 c' Z4 S! p
-2Gb x16 SLC 1Gb x16 LPDDR1 4-bit(64B) 130B (8mmx 9mm) JSFBAC2NH3CBA-450 + ]2 R" p4 e, o5 m7 [! L  m4 \
-2Gb x16 SLC 1Gb x16 LPDDR1 4-bit 107B (10.5mm x13mm) JSFBAC2NH3BBB-450
$ n, ~6 l. D4 s-1Gb x8 SLC 512Mb x16 LPDDR1 1-bit 107B (10.5mmx 13mm) JSFA9A2NH3ABB-450 - k' s% E6 ]6 d0 z
-1Gb x16 SLC 512Mb x16 LPDDR1 1-bit 130B (8mm x9mm) JSFA9C2NH3ABA-450
6 ?# U1 w2 L2 p! }* R$ Z! B3 [-1Gb x16 SLC 512Mb x16 LPDDR1 1-bit 107B (10.5mmx 13mm) JSFA9C2NH3ABB-450 6 b5 h* h% m4 ]& }& t" b. r
-1Gb x8 SLC 512Mb x32 LPDDR1 1-bit 137B (10.5mmx 13mm) JSFA9B2NH3ABC-450
' x# ~- O3 s% e+ [; m-1Gb x8 SLC 512Mb x32 LPDDR1 4-bit 130B (8mm x9mm) JSFA9B2NH3BBA-450 -4 M$ F- N: o, O) Z$ P/ [( N! U, d5 K
-1Gb x8 SLC 512Mb x16 LPDDR1 4-bit 130B (8mm x9mm) JSFA9A2NH3BBA-450
4 }* l: T6 C& a( A9 y3 f$ r1 U, x-1Gb x8 SLC 512Mb x16 LPDDR1 4-bit 107B (10.5mmx 13mm) JSFA9A2NH3BBB-450
; @: x9 ]1 p4 c% q2 h-1Gb x8 SLC 512Mb x32 LPDDR1 4-bit 137B (10.5mmx 13mm) JSFA9B2NH3BBC-450
7 \2 S% u# a2 p7 V7 J& C) w-1Gb x16 SLC 512Mb x16 LPDDR1 4-bit 130B (8mm x9mm) JSFA9C2NH3BBA-450
. `1 i" u5 c3 r) V; h  I: N-1Gb x16 SLC 512Mb x16 LPDDR1 4-bit 107B (10.5mmx 13mm) JSFA9C2NH3BBB-450
% z3 u, o+ i3 q4 x: E" c' i: o8 Y7 v-1Gb x16 SLC 512Mb x32 LPDDR1 4-bit 130B (8mm x9mm) JSFA9D2NH3BBA-450 # r, Y* L) Y: L( h- ~
-1Gb x8 SLC 256Mb x16 SDR 1-bit 107B (10.5mm x13mm) JSFA8A1NH3ABB-460
4 R5 W* x& \) T  @+ \0 G-1Gb x8 SLC 256Mb x16 SDR 1-bit 107B (10.5mm x13mm) JSFA8A2NH3ABB-450 $ l3 D' s! d3 W, o: A' H! p! k
-1Gb x16 SLC 256Mb x16 SDR 1-bit 130B (8mm x9mm) JSFA8C1NH3ABA-460
/ `7 V% H/ F+ Y1 c: |7 l2 d-1Gb x16 SLC 256Mb x16 SDR 1-bit 130B (8mm x9mm) JSFA8C2NH3ABA-450 / r' ]6 R+ |8 `+ z. Y; h. `
-1Gb x8 SLC 256Mb x16 SDR 4-bit 130B (8mm x 9mm)JSFA8A2NH3BBA-450 * ?% ?  o3 e& g( H
-1Gb x16 SLC 256Mb x16 SDR 4-bit 130B (8mm x9mm) JSFA8C2NH3BBA-450( J# j: ?/ k* {) w0 A% ]& Y8 }$ X
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