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[讨论] JSC 济州半导体Nand MCP搭配高通联芯方案

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发表于 2018-7-27 15:57:04 | 显示全部楼层 |阅读模式
JSC 济州半导体是全球最大的移动应用解决方案提供商之一的SRAM
" Q( x- G6 n4 q# y2 T) [由于济州半导体出道到SRAM(静态随机存取存储器)和4MSRAM的2001市场,济州半导体持续实施全系列低功耗SRAM产品通过1M、2M、4M至8M SRAM。% u1 S4 G0 p: D3 y6 S
济州半导体的SRAM是建立在强大的6晶体管存储单元的技术,可以在非常低的功耗的快速存取时间。济州半导体存储器产品已被公认为最强大的低功耗存储解决方案,可以稳定地运行任何严谨的环境下可以通过移动手机。济州半导体是由世界领先的手机制造商公认的一个最可靠的SRAM制造商。除了手机应用,济州半导体SRAM SRAM提供产品应用在全世界。
# N! x7 P# l5 n6 j) S% ]" P7 w5 U; V# m7 @. e5 T4 ?5 c% E
emcp:8 @% Z& _; M/ ~
4GB + 4Gb 162B (11.5mm x 13mm) JSMPFC1BA1HYHABD-H418
; U  T" d# W5 a8GB + 4Gb 162B (11.5mm x 13mm) JSMPGC1BA1HYHABD-H418
5 _! z" P4 G" t, ~nand mcp:
0 C: g& _6 c, e5 v7 w9 |JSFCBB3Y7ABBD-425,JSFCBB3YHABBD-42,JSFCBB3YH3BBD-425
1 A) p1 Q4 L, p7 L( K-4Gb x16 SLC 2Gb x32 LPDDR2 4-bit 400MHz 162B JSFCBD3YAABBD-425 6 g' S% n! }% U( S: g# j
-4Gb x8 SLC 2Gb x32 LPDDR2 4-bit 533MHz 162B JSFCBB3Y7ABBD-425A
3 x( t) f5 F) K3 ~9 n+ _- _-4Gb x8 SLC 2Gb x32 LPDDR2 4-bit 533MHz JSFCBB3Y7ABBG-425A
% J9 J( _" ~3 {-4Gb x16 SLC 2Gb x32 LPDDR2 4-bit 533MHz 162B JSFCBD3Y7ABBD-425A
. j* g6 U9 P' R2 N* B-2Gb x8 SLC 2Gb x32 LPDDR2 4-bit 400MHz JSFBBB3YHABBG-425, S2 A/ x3 d7 Q: a0 X9 @" n& D
-2Gb x16 SLC 2Gb x32 LPDDR2 4-bit 400MHz 162B JSFBBD3YHABBD-425 / x! S' s- M# l
-2Gb x16 SLC 2Gb x32 LPDDR2 4-bit 400MHz162B  JSFBBD3YHABBG-425
: F* J" z- `( Z4 F' Y-2Gb x16 SLC 2Gb x32 LPDDR2 4-bit 533MHz 162B JSFBBD3YHABBD-425A
$ ~' b8 {6 g6 D* U0 Y2 N5 |( M0 D-2Gb x16 SLC 2Gb x32 LPDDR2 4-bit 533MHz 162B JSFBBD3YHABBG-425A # q0 R; B: p- C' Z
-2Gb x8 SLC 1Gb x16 LPDDR2 4-bit 400MHz 121B JSFBAA3YHABBE-425
0 W0 A$ {# H4 E! e2 e6 d( ^-2Gb x8 SLC 1Gb x32 LPDDR2 4-bit 400MHz 162B JSFBAB3YHABBD-425 * n5 r* O$ e5 u# j' y% b  x5 D
-2Gb x8 SLC 1Gb x32 LPDDR2 4-bit 400MHz 162B JSFBAB3YHABBG-425 ' X( G  W  Z, I1 G
-2Gb x16 SLC 1Gb x16 LPDDR2 4-bit 400MHz 121B JSFBAC3YHABBE-425 3 T$ h( U/ D! d" r5 H' x* d: R
-2Gb x16 SLC 1Gb x32 LPDDR2 4-bit 400MHz 162B JSFBAD3YHABBD-425 9 W9 H3 l: M+ z! L! S+ y
-2Gb x16 SLC 1Gb x32 LPDDR2 4-bit 400MHz 162B JSFBAD3YHABBG-425+ S( \7 Z4 ^7 H2 x* X& d" N+ L
-1Gb x8 SLC 1Gb x16 LPDDR2 4-bit 121B JSFAAA3Y7ABBE-425
& g* d- ~6 i2 z5 Q3 f- X& ?5 y-1Gb x8 SLC 1Gb x32 LPDDR2 4-bit 162B JSFAAB3Y7ABBD-425
- x# I  l" k! H) O-4Gb x8 SLC 2Gb x32 LPDDR1 4-bit 130B JSFCBB2N7ABBA-450 ( n7 g* Q7 N1 f+ z5 C8 }
-4Gb x8 SLC 2Gb x32 LPDDR1 4-bit 137B JSFCBB2N7ABBC-450 0 t8 z. c+ Z  y0 D& }9 h
-4Gb x16 SLC 2Gb x32 LPDDR1 4-bit 130B JSFCBD2N7ABBA-450
; T. h- m$ l/ r! v$ y-4Gb x16 SLC 2Gb x32 LPDDR1 4-bit 137B JSFCBD2N7ABBC-450 . x0 [$ @2 {) ?: {; ~) `
-2Gb x8 SLC 1Gb x32 LPDDR1 1-bit 130B JSFBAB2N73ABA-450 6 H2 W4 f2 B& P
-1Gb x16 SLC 1Gb x16 LPDDR2 4-bit JSFAAC3Y7ABBE-425 7 x( b( U' i6 {0 G
-1Gb x16 SLC 1Gb x16 LPDDR2 4-bit JSFAAC3YHABBE-425 . q1 V7 W) o8 a4 S3 Q
-2Gb x8 SLC 1Gb x32 LPDDR1 1-bit 137B JSFBAB2N72ABC-450
! x: e/ Z7 G1 \& H4 ^-2Gb x16 SLC 1Gb x16 LPDDR1 1-bit 130B JSFBAC2N73ABA-450 8 W; y; e. ]/ s! q  v  g
-2Gb x16 SLC 1Gb x16 LPDDR1 1-bit 130B JSFBAC2N72ABA-450
  d. _- ~& ~4 Q  n4 h-2Gb x16 SLC 1Gb x16 LPDDR1 1-bit 107B JSFBAC2N73ABB-450
$ B2 ~  L: n, W! F/ @1 G/ n0 {-2Gb x16 SLC 1Gb x16 LPDDR1 1-bit 107B JSFBAC2N72ABB-450 " n2 ~7 l& x+ A1 q
-1Gb x8 SLC 512Mb x16 LPDDR1 1-bit 107B JSFA9A2N73ABB-450
7 l. x; F9 A) ~+ _5 X' X+ Q-1Gb x8 SLC 512Mb x16 LPDDR1 4-bit 130B (8mm x9mm) JSFA9A2N73BBA-450 , M* e7 ~- z* o, e4 L8 I
-1Gb x8 SLC 512Mb x16 LPDDR1 4-bit 130B (8mm x9mm) JSFA9A2N72BBA-450
) W- `2 Z  z* @2 ^-1Gb x8 SLC 512Mb x32 LPDDR1 1-bit 137B (10.5mmx 13mm) JSFA9B2N72ABC-450. F: |6 [+ ?# q
-1Gb x16 SLC 512Mb x16 LPDDR1 1-bit 107B (10.5mmx 13mm) JSFA9C2N72ABB-450 ( w1 h( `/ `* V5 b" V' t: Y: f3 {1 V
-1Gb x16 SLC 512Mb x16 LPDDR1 1-bit 107B (10.5mmx 13mm) JSFA9C2N73ABB-450
" p6 b8 _) y7 P  t6 Q3 }-1Gb x16 SLC 512Mb x16 LPDDR1 1-bit 130B (8mm x9mm) JSFA9C2N72ABA-450 ! E2 h: x. a6 S; ~! \5 |8 a
-1Gb x16 SLC 512Mb x16 LPDDR1 1-bit 130B (8mm x9mm) JSFA9C2N73ABA-450 , F" A8 f8 W5 w  m& N4 i* E
-1Gb x16 SLC 512Mb x16 LPDDR1 4-bit 107B (10.5mmx 13mm) JSFA9C2N72BBB-450
0 \6 U, G1 W8 U) R$ T  ~# U+ I-1Gb x16 SLC 512Mb x16 LPDDR1 4-bit 130B (8mm x9mm) JSFA9C2N72BBA-450 9 {8 Q7 p2 @) S( v
-1Gb x16 SLC 512Mb x16 LPDDR1 4-bit 130B (8mm x9mm) JSFA9C2N73BBA-450
1 m. g. r: a1 U# c1 o" u-1Gb x16 SLC 512Mb x32 LPDDR1 1-bit 130B (8mm x9mm) JSFA9D2N73ABA-450
& m; x4 l9 [' C* ^0 @+ F. \" j-1Gb x16 SLC 512Mb x32 LPDDR1 1-bit 130B (8mm x9mm) JSFA9D2N72ABA-450 % `: d1 O& h- m* `7 d: m0 O
-1Gb x8 SLC 512Mb x16 SDR 1-bit 107B (10.5mm x13mm) JSFA9A1N72ABB-460
) W3 g1 F% y' F! s4 D, S. Z9 {-1Gb x8 SLC 512Mb x32 SDR 1-bit 137B (10.5mm x13mm) JSFA9B1N72ABC-460
( F$ U3 J4 S, V0 |2 ^4 _2 _' Y- O-1Gb x8 SLC 256Mb x16 LPDDR1 1-bit 107B (10.5mmx 13mm) JSFA8A2N73ABB-450
( T0 ]& ^% M: n6 }' e" z4 n! e, s-1Gb x8 SLC 256Mb x16 LPDDR1 4-bit 130B (8mm x9mm) JSFA8A2N73BBA-450
  E1 e$ Y4 \/ r& `1 g" Y, ]% h-1Gb x16 SLC 256Mb x16 LPDDR1 1-bit 130B (8mm x9mm) JSFA8C2N73ABA-450 + e, o$ ^# m" L1 X1 s+ `7 y( Y
-1Gb x16 SLC 256Mb x16 LPDDR1 4-bit 130B (8mm x9mm) JSFA8C2N73BBA-45
- f9 R) f4 k  y% v8 F5 _% X-1Gb x8 SLC 256Mb x32 SDR 1-bit 137B (10.5mm x13mm) JSFA8B1N72ABC-460
( \% @/ p% a% K# h$ S-4Gb x8 SLC 2Gb x32 LPDDR1 4-bit 137B (10.5mm x13mm) JSFCBB2NHABBC-450 ! i( }% @- q% T% i& i/ X' |
-4Gb x16 SLC 2Gb x32 LPDDR1 4-bit 137B (10.5mm x13mm) JSFCBD2NHABBC-450 , d: N' L! \0 P: Z2 W2 z  g
-2Gb x8 SLC 1Gb x16 LPDDR1 1-bit 130B (8mm x9mm) JSFBAA2NH3ABA-450 " C) C! Z& B1 U7 n) a9 G8 x! ~
-2Gb x8 SLC 1Gb x32 LPDDR1 1-bit 130B (8mm x9mm) JSFBAB2NH3ABA-450
1 x& o" j/ }, I% h* z0 i2 V-2Gb x8 SLC 1Gb x32 LPDDR1 4-bit 130B (8mm x9mm) JSFBAB2NH3BBA-450 6 ~* {) K$ p7 k* n9 Z0 r7 z. f
-2Gb x8 SLC 1Gb x32 LPDDR1 4-bit(64B) 130B (8mmx 9mm) JSFBAB2NH3CBA-450
# X( r* W6 U) G- H-2Gb x8 SLC 1Gb x32 LPDDR1 4-bit 137B (10.5mm x13mm) JSFBAB2NH3BBC-450
& R7 D: d2 a$ n- [-2Gb x16 SLC 1Gb x16 LPDDR1 4-bit 130B (8mm x9mm) JSFBAC2NH3BBA-450
( q" @. }* Q& s. ?$ [$ q/ R/ `-2Gb x16 SLC 1Gb x16 LPDDR1 4-bit(64B) 130B (8mmx 9mm) JSFBAC2NH3CBA-450
+ ^( T4 d+ M  g- C! p. \4 b-2Gb x16 SLC 1Gb x16 LPDDR1 4-bit 107B (10.5mm x13mm) JSFBAC2NH3BBB-450
; G# C( c2 f0 q) y. @4 ~5 f1 c-1Gb x8 SLC 512Mb x16 LPDDR1 1-bit 107B (10.5mmx 13mm) JSFA9A2NH3ABB-450
* |% ?* e: W0 C3 o$ Z1 P' g-1Gb x16 SLC 512Mb x16 LPDDR1 1-bit 130B (8mm x9mm) JSFA9C2NH3ABA-450 . N/ E3 w* E6 Q# Z1 P( @( n
-1Gb x16 SLC 512Mb x16 LPDDR1 1-bit 107B (10.5mmx 13mm) JSFA9C2NH3ABB-450
2 P. m4 j% T# W/ o; l; W-1Gb x8 SLC 512Mb x32 LPDDR1 1-bit 137B (10.5mmx 13mm) JSFA9B2NH3ABC-450 6 w) s$ j; Y1 m
-1Gb x8 SLC 512Mb x32 LPDDR1 4-bit 130B (8mm x9mm) JSFA9B2NH3BBA-450 -
7 U; B$ T. h$ Y  q2 \5 H/ H0 l4 f-1Gb x8 SLC 512Mb x16 LPDDR1 4-bit 130B (8mm x9mm) JSFA9A2NH3BBA-450
! \) c& T( ]1 c- h0 ?-1Gb x8 SLC 512Mb x16 LPDDR1 4-bit 107B (10.5mmx 13mm) JSFA9A2NH3BBB-450
$ X% G; c: S  F-1Gb x8 SLC 512Mb x32 LPDDR1 4-bit 137B (10.5mmx 13mm) JSFA9B2NH3BBC-450 : ]  w" k4 e! [3 @. U
-1Gb x16 SLC 512Mb x16 LPDDR1 4-bit 130B (8mm x9mm) JSFA9C2NH3BBA-450
# B( O( s; t$ d) B1 W-1Gb x16 SLC 512Mb x16 LPDDR1 4-bit 107B (10.5mmx 13mm) JSFA9C2NH3BBB-450 ' C$ G7 @4 C& k0 g: a$ G6 @. j
-1Gb x16 SLC 512Mb x32 LPDDR1 4-bit 130B (8mm x9mm) JSFA9D2NH3BBA-450
6 ?; W2 O: D& e" n/ d5 `& e" t% ?3 Y) Q-1Gb x8 SLC 256Mb x16 SDR 1-bit 107B (10.5mm x13mm) JSFA8A1NH3ABB-460 1 b1 a# n7 e( l' T& K3 g' I
-1Gb x8 SLC 256Mb x16 SDR 1-bit 107B (10.5mm x13mm) JSFA8A2NH3ABB-450 + L4 w" j2 K7 ~$ `& v
-1Gb x16 SLC 256Mb x16 SDR 1-bit 130B (8mm x9mm) JSFA8C1NH3ABA-460 1 ^: z) b' _# h3 s' ]* B: o
-1Gb x16 SLC 256Mb x16 SDR 1-bit 130B (8mm x9mm) JSFA8C2NH3ABA-450
! w( J( h, c- M4 W2 Q-1Gb x8 SLC 256Mb x16 SDR 4-bit 130B (8mm x 9mm)JSFA8A2NH3BBA-450
/ [6 O, V# A  c& l3 K6 d-1Gb x16 SLC 256Mb x16 SDR 4-bit 130B (8mm x9mm) JSFA8C2NH3BBA-450$ d# r5 N: W! A
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